In the integrated circuit industry, it is common practice to test finished ICs before they are shipped to users. To ensure efficiency and low cost, the ICs are typically tested automatically by systems which are collectively referred to as automatic test equipment (ATE). A typical ATE system for testing a finished IC includes a control system such as a personal computer programmed to run tests and process and store test result data automatically. The system also includes various power sources used to power the IC under test and to generate any test signals required for the tests. These can typically include DC as well as AC sources. The system also includes a xe2x80x9ctest headxe2x80x9d in which the IC is mounted for the test. The test head typically includes a device interface board (DIB) which provides the appropriate electronic interface between the IC under test and the rest of the test system. The DIB typically makes connections to the IC via the connection pins on the IC package. Test stimulus signals generated by the test system are applied to the appropriate IC inputs and resulting response signals from the IC outputs are coupled to the test system via the DIB connections to the IC pins.
In present technology, ICs operate at extremely high speed and with very small voltage and power variation tolerances. As a result, the signals used in an ATE system to stimulate an IC under test must also be generated with extreme accuracy and precision. Signal voltage levels must be held to very close tolerances, and signals must be generated to operate at extremely high speed with very close timing tolerances. In addition, the quality of time varying test signals must be very carefully controlled. For example, when testing a digital circuit, it is often desirable to generate a train of square pulses to be applied to the circuit. Because of the high-speed and low-voltage requirements of present digital circuits, the various attributes of the square pulses, such as rise and fall times, duty cycle, symmetry, overshoot, undershoot, etc., must be controlled very accurately.
To generate these various test signals from the power supply outputs, and to accurately process resulting output response signals from the circuit under test, an ATE system typically also includes additional circuitry between the controlling processor and the DIB. This circuitry, commonly referred to as xe2x80x9cpin electronics,xe2x80x9d includes driving circuitry for generating the stimulus signals to be applied to the IC input pins and receiving and detection circuitry for processing response signals from the IC output pins.
Conventional pin driver circuits exhibit various drawbacks when they are called upon to generate the highly accurate stimulus signals required by present high-speed circuits. For example, conventional amplification stages which require current to switch on and off to generate square pulses cannot generate short pulses with symmetry, i.e., substantially equal rise and fall times.
The present invention is directed to a circuit testing apparatus and method which provide circuit testing drive signals with extremely accurate timing and voltage parameters and which exhibit a high level of pulse symmetry. The circuit testing apparatus of the invention includes a controller which controls signals being transferred between the circuit under test and the circuit testing apparatus. A driver circuit in the circuit testing apparatus generates signals to be applied to the circuit under test. The driver circuit includes an output stage circuit coupled to the circuit under test. The output stage circuit includes a linear amplifier which receives a control signal from the controller and generates from the control signal a drive signal to be applied to the circuit under test. In one embodiment, the linear amplifier is a class A linear amplifier.
The driver circuit is coupled to a pin on the circuit under test. In general, the pin electronics can include a separate driver circuit for each pin on the circuit under test, with a driver circuit being couple to each pin, such that separately generated and controllable drive signals can be applied to each pin.
The circuit testing apparatus can also include a receiver circuit coupled to a pin on the circuit under test to receive output or response signals from the circuit under test. In general, the pin electronics can include a separate receiver circuit for each pin on the circuit under test, with a receiver circuit being coupled to each pin, such that response signals from multiple pins can be separately received and processed by the pin electronics.
The pin electronics of the invention can include a driver circuit and a receiver circuit coupled together into a receiver/driver circuit which is coupled to a pin on the circuit under test. When a signal is being received by the pin electronics via the pin, the driver circuit portion of the receiver/driver circuit is electrically disconnected from the pin. Likewise, when a stimulus signal is being applied to the pin, the receiver portion of the receiver/driver circuit can be electrically disconnected from the pin. In general, the pin electronics include a receiver/driver circuit coupled to each pin on the circuit under test that is being used to test the circuit. Each receiver/driver circuit is individually controllable to receive signals on its respective circuit pin and/or apply a stimulus signal to its respective pin.
In one embodiment, each driver circuit includes a pair of transistors for driving the output stage circuit. In one embodiment, the pair of transistors is a differential-input pair which receives a differential voltage input signal to generate the drive signal to be applied to the circuit under test. In one particular embodiment, the transistors are bipolar junction transistors. A current source can be coupled to the transistors to drive a current through the transistors. A resistance can be coupled between the transistors such that the differential voltage input signal controls an amount of current conducted through the resistance to control a current level in each of the transistors to generate the drive signal applied to the circuit under test.
In one embodiment, the driver circuit includes a pair of current sources, one for each transistor. Each current source drives a current through its respective transistor. Again, the resistance is coupled between the transistors such that the differential voltage input signal controls an amount of current through the resistance to control a current level in each of the transistors to generate the drive signal applied to the circuit under test.
The circuit testing apparatus of the invention provides numerous advantages over prior approaches. Because the output stage of the driving circuit uses a linear amplifier, transistors in the output stage do not switch on and off. This reduces the effects of stray capacitance and stored charge in the transistors of the output stage such that drive signals with highly accurate attributes such as voltage level, timing, etc., as well as pulses with high levels of symmetry, can be obtained. This results in a test system capable of providing highly accurate and efficient testing of high-speed digital circuits such as the future generations of microprocessors.